基于FPGA的嵌入式通信系统核心模块设计Design of FPGA-based core module for embedded communication system
杨胜利,李超,余亮
摘要(Abstract)：
基于IP核的SpaceWire-PCI通信卡进行通信时,没有考虑传输过程内相位失真问题,其通信效果存在实时性能低、抗干扰性差和通用性低的缺点。据此设计基于FPGA的嵌入式通信系统的通信卡,其整体架构由FPGA模块、以太网88E1111 PHY芯片、MCP2515 CAN控制器等组成。采用FIR滤波器分布式算法处理通信卡信号传输时的内相位失真问题。利用SoPC系统的NiosⅡ集成开发环境设计通信卡软件:设计初始化程序实现FPGA模块中CycloneⅢ3C25F32芯片控制寄存器的配置;设计通信程序实现通信卡中数据信息的发送和接收。实验证明,所设计通信卡通信效果具有实时性高,抗干扰性好及通用性高等优势,能够极大地提高通信效率。
关键词(KeyWords)： FPGA;嵌入式系统;通信卡;接口电路;控制寄存器;通信程序
基金项目(Foundation): 广东省教育厅特色创新类项目(2015KTSCX162);广东省教育厅特色创新类项目(2015KTSCX163);广东省教育厅青年创新人才类项目(2016KQNCX186)~~
作者(Author): 杨胜利,李超,余亮
DOI: 10.16652/j.issn.1004-373x.2018.22.022
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