基于FPGA的NoC仿真器的设计与实现Design and implementation of NoC simulator based on FPGA
王江峰,宋庆增,张静,武继刚
摘要(Abstract)：
片上网络的设计有很多功耗、面积和性能折中的拓扑结构、缓冲区大小、路由算法和流量控制机制,因此新的NoC设计的研究非常耗时。为了应对这些挑战,提出一种基于快速灵活的FPGA片上网络仿真架构,通过映射虚拟化的NoC组件到一个通用的片上网络仿真引擎上,其基础部件有流量生成器、路由、飞片队列等。并提出基于规则拓扑结构自动生成NoC拓扑结构的设想,且在设计的通用片上网络仿真引擎实施这种设想。实践表明:因为所设计的仿真器是虚拟的,可以模拟任何可用图描述的NoC拓扑结构;任何拓扑结构的片上网络可以映射到机器而无需重建,在一个大型片上网络设计中,用FPGA来实施可以节省很多时间。
关键词(KeyWords)： 片上网络;FPGA;仿真器;拓扑结构;虚拟化;自动生成
基金项目(Foundation): 高等学校博士学科点专项科研基金(20131201110002);; 国家科学自然基金(61672171)~~
作者(Author): 王江峰,宋庆增,张静,武继刚
DOI: 10.16652/j.issn.1004-373x.2018.19.042
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