| 51 | 2 | 0 |
 阅读 |
 下载 |
 被引 |
针对自动调零技术引发的宽带噪声混叠问题以及斩波调制技术固有的输出纹波缺陷，基于40 V BCD工艺设计了一款高压零漂移轨到轨输出集成运算放大器。该放大器采用Ping-Pong架构，同时结合自动调零和斩波调制技术，在斩波和自动调零频率处获得较低的低频噪声和能量。为满足运放在30 V电源电压下对最高输入电压范围的要求，输入端采用隔离型NLDMOS管作为开关器件，并创新性地设计了体电位偏置电路，保证在宽输入范围内阈值电压的稳定性，并降低导通电阻。从电源到地的每条支路电路均至少由一个LDMOS的漏源电压来承受高压。采用跨导线性环对Class AB输出级进行偏置，实现了高压轨到轨输出。在密勒补偿的基础上，设计前馈跨导级对运算放大器进行频率补偿。仿真结果表明，在30 V电源电压下，失调电压为-1.86 μV，失调电压温漂为13.70 nV/℃，开环电压增益为167.7 dB，单位增益带宽为2.1 MHz，实现了失调电压的零漂移。
Abstract：In allusion to the broadband noise aliasing problem caused by auto-zeroing technology and the output ripple defect inherent in chopping modulation technology, a high-voltage zero-drift rail-to-rail output integrated operational amplifier is designed based on 40 V BCD technology. In this amplifier, a Ping-Pong architecture is adopted, and auto-zero and chopper modulation technologies are combined to achieve lower low-frequency noise and power at the chopping and auto-zeroing frequencies. In order to meet the requirement for the highest input voltage range of the operational amplifier under a 30 V power supply voltage, an isolated NLDMOS transistor is used as switch device at the input end, and a novel body potential bias circuit is innovatively designed to ensure the stability of the threshold voltage over a wide input range and reduce the on-resistance. Each branch circuit from the power supply to ground withstands high voltage via at least one LDMOS drain-source voltage. The Class AB output stage was biased by a transconductance linear loop to realize the high-voltage rail-to-rail output. On the basis of Miller compensation, a feedforward transconductance stage was designed for the frequency compensation of the operational amplifier. The simulation results show that, within supply voltage of 30 V, the offset voltage is -1.86 μV, the offset voltage temperature drift is 13.70 nV/℃, the open loop voltage gain is 167.7 dB, and the unity gain bandwidth is 2.1 MHz, achieving the zero drift of offset voltage.
[1] Yoo M, Son H, Kim K, et al. Zero-drift fully differential amplifier with ping-pong auto-zero stabilization and digitally-assisted coarse automatic offset calibration [J]. IEEE Transactions on Circuits and Systems II: Express Briefs, 2025, 72(1): 38-42.
[2] 刘国庆，孙婧雯，马奎，等.一种低失调轨到轨集成运算放大器的设计[J].半导体技术，2023，48（2）：151-156.
[3] Zhang Junan, Feng Yuan, Zhang Chuandao. A 12 nm CMOS rail-to-rail auto-zero operational amplifier [C]// 2024 9th International Conference on Integrated Circuits and Microsystems (ICICM). Wuhan: IEEE, 2024: 119-123.
[4] Ge Tongjin, Li Penghai, Duan Quanzhen, et al. A low-noise, high-precision chopper instrument amplifier for EEG signal amplification [C]// 2023 5th International Conference on Circuits and Systems (ICCS). Hangzhou: IEEE, 2023: 75-80.
[5] Kusuda Y. A 60 V auto-zero and chopper operational amplifier with 800 kHz interleaved clocks and input bias current trimming [J]. IEEE Journal of Solid-State Circuits, 2015, 50(12): 2804-2813.
[6] 沈磊，王玉伟，李秋里，等.一种基于斩波技术的高压运算放大器芯片[J/OL].微电子学：1-7[2025-04-03].https://link.cnki.net/doi/10.13911/j.cnki.1004-3365.240102.
[7] Witte J F, Makinwa K A A, Huijsing J H. A CMOS chopper offset-stabilized OPAMP [J]. IEEE Journal of Solid-state Circuits, 2007, 42(7): 1529-1535.
[8] Bakker A, Huijsing J H. A CMOS chopper OPAMP with integrated low-pass filter [C]// Proceedings of the 23rd European Solid-State Circuits Conference (ESSCIRC). Southampton, UK: IEEE, 1997: 200-203.
[9] 李文.零漂移精密集成运算放大器研究与设计[D].贵阳：贵州大学，2022.
[10] Stanescu C, Dinca C, Mcdonald D, et al. A 24 V chopper offset-stabilized operational amplifier with symmetrical RC notch filters [C]// 2017 International Semiconductor Conference (CAS). Sinaia, Romania: IEEE, 2017: 167-170.
[11] 张亦乐.高压轨到轨输入输出运算放大器的研究与设计[D].兰州：兰州大学，2024.
[12] Fan Qinwen, Huijsing J H, Makinwa K A A. A capacitively-coupled chopper operational amplifier with 3μV offset and outside-the-rail capability [C]// Proceedings of the 38rd European Solid-State Circuits Conference (ESSCIRC). Bordeaux, France: IEEE, 2012: 73-76.
[13] Nam G, Choi G, Yoo M, et al. Low-noise chopper-stabilized zero-drift amplifier with SAR-assisted automatic offset calibration loop [J]. IEEE Access, 2023, 11: 137688-137701.
基本信息:
DOI：10.16652/j.issn.1004-373X.2026.18.006
引用信息:
[1]宋春博1,刘传兴1,马奎1,2,3,等.高压零漂移轨到轨输出集成运算放大器设计[J],2026,49(18):34-42.DOI:10.16652/j.issn.1004-373X.2026.18.006.
基金信息:
贵州省科技重大专项（黔科合平台SSYS [2025]重大006）;贵州省科技成果应用及产业化计划（重大项目）（黔科合成果[2024]重大006）